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NXP Semiconductors /LPC43xx /GPDMA /ENBLDCHNS

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Interpret as ENBLDCHNS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLEDCHANNELS0)ENABLEDCHANNELS0 0 (ENABLEDCHANNELS1)ENABLEDCHANNELS1 0 (ENABLEDCHANNELS2)ENABLEDCHANNELS2 0 (ENABLEDCHANNELS3)ENABLEDCHANNELS3 0 (ENABLEDCHANNELS4)ENABLEDCHANNELS4 0 (ENABLEDCHANNELS5)ENABLEDCHANNELS5 0 (ENABLEDCHANNELS6)ENABLEDCHANNELS6 0 (ENABLEDCHANNELS7)ENABLEDCHANNELS7 0RESERVED

Description

DMA Enabled Channel Register

Fields

ENABLEDCHANNELS0

Enable status for DMA channels. Each bit represents one channel: 0 - DMA channel is disabled. 1 - DMA channel is enabled.
ENABLEDCHANNELS1

Enable status for DMA channels. Each bit represents one channel: 0 - DMA channel is disabled. 1 - DMA channel is enabled.
ENABLEDCHANNELS2

Enable status for DMA channels. Each bit represents one channel: 0 - DMA channel is disabled. 1 - DMA channel is enabled.
ENABLEDCHANNELS3

Enable status for DMA channels. Each bit represents one channel: 0 - DMA channel is disabled. 1 - DMA channel is enabled.
ENABLEDCHANNELS4

Enable status for DMA channels. Each bit represents one channel: 0 - DMA channel is disabled. 1 - DMA channel is enabled.
ENABLEDCHANNELS5

Enable status for DMA channels. Each bit represents one channel: 0 - DMA channel is disabled. 1 - DMA channel is enabled.
ENABLEDCHANNELS6

Enable status for DMA channels. Each bit represents one channel: 0 - DMA channel is disabled. 1 - DMA channel is enabled.
ENABLEDCHANNELS7

Enable status for DMA channels. Each bit represents one channel: 0 - DMA channel is disabled. 1 - DMA channel is enabled.
RESERVED

Reserved. Read undefined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data